کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
425612 685784 2015 9 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
Efficient hardware implementation of PMI+ for low-resource devices in mobile cloud computing
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر نظریه محاسباتی و ریاضیات
پیش نمایش صفحه اول مقاله
Efficient hardware implementation of PMI+ for low-resource devices in mobile cloud computing
چکیده انگلیسی


• We design a hardware to implement MQ asymmetric cipher PMI+ for low-resource devices.
• Basic arithmetic units are implemented in optimized and full parallel.
• Our design can complete a large power operation in 16 clock cycles.
• Our hardware can complete an encryption operation of PMI+ within 497 clock cycles, and a decryption operation within 438 clock cycles.
• Our design has a good performance in cycle-area products.

With rapid development of cloud computing, security issues have gained more and more attention, especially in mobile cloud computing environment. Smart phones and other mobile devices provide a lot of convenience to us, but due to its intrinsic low-resource limitation, it also causes many security problems. In this paper, we design a hardware that can efficiently implement PMI+, which is a Multivariate Quadratic (MQ) asymmetric cipher, for low-resource devices in mobile cloud computing. Our main contributions are that, firstly, hardware architectures of encryption and decryption of PMI+ are developed, and descriptions of corresponding hardware algorithm are proposed; secondly, basic arithmetic units are implemented with higher efficiency that multiplication, squaring, vector dot product and power operation are implemented in full parallel; and thirdly, optimized implementations for core modules, including optimized large power operation, are achieved. The encryption and decryption hardware of PMI+ is efficiently realized on FPGA by the above optimization and improvement. It is verified by experiments that the designed hardware can complete an encryption operation within 497 clock cycles, and the clock frequency can be up to 145.60 MHz, and the designed hardware can complete a decryption operation within 438 clock cycles wherein the clock frequency can be up to 132.21 MHz. Our experiment results also confirm that our design can be deployed in low-resource devices as thin client of mobile cloud computing.

ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Future Generation Computer Systems - Volume 52, November 2015, Pages 116–124
نویسندگان
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