Stack engineering of TANOS charge-trap flash memory cell using high-κ ZrO2 grown by ALD as charge trapping layer

ZrO2 with a κ value of 30 grown by atomic layer deposition has been integrated as charge trapping layer alternative to Si3N4 in TANOS-like memory capacitors, with Al2O3 as blocking oxide, SiO2 as tunnel oxide and TaN metal gate. The fabricated device featuring 24 nm ZrO2 exhibits efficient program and erase operations under Fowler–Nordheim tunneling when compared to a Si3N4 based reference device with similar EOT and fabricated under the same process conditions. The effect of stack thermal budget (900–1030 °C range) on memory performance and reliability is investigated and correlated with physical analyses. Finally, scaling ZrO2 down to 14 nm allows program and erase at lower voltages, even if the trapping efficiency and retention of these device need further improvements for the integration of ZrO2 in next generation charge trapping nonvolatile memories.

ALD-grown ZrO2 (k ∼ 30) is investigated as charge trapping layer in a TAZOS memory. The impact of ZrO2 thickness and PDA on TAZOS memory characteristics is analyzed and discussed.Figure optionsDownload as PowerPoint slide