Influence of annealing temperature on the electrical and structural properties of palladium Schottky contacts on n-type 4H-SiC

We have investigated the electrical and structural properties of Pd/4H-SiC Schottky diodes as a function of annealing temperature using I-V, C-V, AES and XRD measurements. The barrier height (BH) of the as-deposited Pd/4H-SiC Schottky diode is found to be 0.71 eV (I-V) and 1.18 eV (C-V), respectively. When the Pd/4H-SiC Schottky diode is annealed at 300 °C, a maximum BH is achieved and corresponding values are 0.89 eV (I-V) and 1.30 eV (C-V). Further, an increase in annealing temperature up to 400 °C, the BH decreases to 0.81 eV (I-V) and 1.20 eV (C-V). Using Cheung's functions, the barrier height (ϕb), ideality factor (n), and series resistance (Rs) are also calculated. Experimental results clearly indicate that the optimum annealing temperature for the Pd Schottky contact to 4H-SiC is 300 °C. According to the Auger electron spectroscopy (AES) and X-ray diffraction (XRD) results, the formation of interfacial phases at the Pd/4H-SiC interface could be the reason for the increase or decrease in BH upon annealing at elevated temperatures. The overall surface morphology of the Pd/4H-SiC Schottky diode is fairly smooth upon annealing temperatures.