Challenges in the implementation of low-k dielectrics in the back-end of line

The introduction of ultra low-k materials in copper technology has been much slower than anticipated in the ITRS Roadmap. The introduction of porosity in low-k materials has increased the level of complexity tremendously. In this paper, the challenges appearing during the integration of ultra low-k dielectrics will be discussed, since a proper understanding of these issues is essential for downscaling of the interconnect system. The inferior mechanical and thermal properties were always identified as main showstoppers for low-k integration. However, the extreme vulnerability of porous low-k to produces-induced damage (accompanied with the loss of dielectric performance and reliability) demands a continuous innovation of materials, processes and integration approaches.