A novel technique at LDMOSs to improve the figure of merit

• Designing a LDMOS transistor with the highest possible figure of merit as the key point.
• Inserting two regions with low doping densities at both ends of the drift region.
• The behavior of electrical field of different structures is investigated.
• On-state resistance and breakdown voltage as the significant parameters are studied.
• Designing a structure with an extra oxide adjacent to the gate sidewall at drain side.

In this paper, we show how the breakdown voltage and the on-state resistance can be improved by controlling of the electric field in LDMOSs. Insertion of two regions with low doping densities at both ends of the drift region as the side walls (SW-LDMOS) to enhance the uniformity of the electric field profile is the main point of this work. Also, the proposed structure has an extra oxide adjacent to the gate sidewall at drain side. By applying voltage to the gate, the density of the accumulation layer around of the extra oxide region increases and the on-state resistance will decrease. Our results show that the on-state resistance of the proposed structure improves and we have the smoother electric field distribution which improves the breakdown voltage.

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