Device optimization and scaling properties of a gate-on-germanium source tunnel field-effect transistor

• A low-κ symmetric spacer and a high-κ gate dielectric result in better device performance.
• Device characteristics strongly depend upon the source doping due to the influence of inversion layer resistance.
• Moderate source doping yields optimum performance.
• Device performance degrades with gate length scaling.
• The effects of quantum confinements have been considered in the analysis.

A gate-on-germanium source (GoGeS) tunnel field-effect transistor (TFET) shows great promise for low-power (sub-0.5 V) applications. A detailed investigation, with the help of a numerical device simulator, on the effects of variation in different structural parameters of a GoGeS TFET on its electrical performance is reported in this paper. Structural parameters such as κ-value of the gate dielectric, length and κ-value of the spacer, and doping concentrations of both the substrate and source are considered. A low-κ symmetric spacer and a high-κ gate dielectric are found to yield better device performance. The substrate doping influences only the p–i–n leakage floor. The source doping is found to significantly affect performance parameters such as OFF-state current, ON-state current and subthreshold swing, in addition to a threshold voltage shift. Results of the investigation on the gate length scaling of such devices are also reported in this paper.