An approach to design and implementation of on-chip clock generator for the switched capacitor based embedded DC-DC converter

Here, the design and implementation of an on-chip clock generator which is needed for a switched capacitor based embedded DC-DC converter is described. The strategies that should be taken during making the design by predicting the occurrence of the parasitic issues at the time of implementation to keep the performance of the clock generator at per in silicon are also elaborated. The reported measurement results closely match with the simulation results in clock generation. It can be a helpful tutorial paper to design and implement an on-chip clock generator suitable for mid-frequency, real time applications.