Novel architecture for QAM modulator-demodulator and its generalization to multicarrier modulation

This paper presents an architecture for quadrature amplitude modulation (QAM) modulator and demodulator with hardware economic structure. While the modulator part requires simple logic circuits for its implementation, the more complex demodulator utilizes Running Fourier transform based on CORDIC (Co-Ordinate Rotation DIgital Computer) processor, for demodulation as well as synchronization. The basic design philosophy has been extended to multicarrier modulation and demodulation technique by using pipelined CORDIC structure for computing Running Fourier transform. The architectures have been implemented with 16 bit wordlength in Xilinx Spartan series field programmable gate arrays (FPGA).