کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
420739 | 683976 | 2006 | 11 صفحه PDF | دانلود رایگان |
A floorplan represents the relative relations between modules on an integrated circuit. Floorplans are commonly classified as slicing, mosaic, or general. Separable and Baxter permutations are classes of permutations that can be defined in terms of forbidden subsequences. It is known that the number of slicing floorplans equals the number of separable permutations and that the number of mosaic floorplans equals the number of Baxter permutations [B. Yao, H. Chen, C.K. Cheng, R.L. Graham, Floorplan representations: complexity and connections, ACM Trans. Design Automation Electron. Systems 8(1) (2003) 55–80]. We present a simple and efficient bijection between Baxter permutations and mosaic floorplans with applications to integrated circuits design. Moreover, this bijection has two additional merits: (1) It also maps between separable permutations and slicing floorplans; and (2) it suggests enumerations of mosaic floorplans according to various structural parameters.
Journal: Discrete Applied Mathematics - Volume 154, Issue 12, 15 July 2006, Pages 1674–1684