کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
447422 1443138 2016 11 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
An evolutionary approach based design automation of low power CMOS Two-Stage Comparator and Folded Cascode OTA
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر شبکه های کامپیوتری و ارتباطات
پیش نمایش صفحه اول مقاله
An evolutionary approach based design automation of low power CMOS Two-Stage Comparator and Folded Cascode OTA
چکیده انگلیسی

This paper presents an evolutionary approach to design CMOS Two-Stage Comparator (TSC) and CMOS Folded Cascode Operational Trans-conductance Amplifier (FCOTA) using simplex particle swarm optimization (Simplex-PSO) method. The simplex particle swarm optimization (Simplex-PSO) is a swarm intelligent based evolutionary computation method. Simplex-PSO is the hybridization of Nelder–Mead Simplex method (NMSM) and Particle Swarm Optimization (PSO) without the velocity term. The Simplex-PSO has fast optimizing capability and high computational precision for high-dimensionality functions. This work has focused on the optimization of the area, power and has improved all other performance parameters of the CMOS TSC and CMOS FCOTA with minimum computational time. The proposed Simplex-PSO based circuit optimization technique is relieved from the inherent drawbacks of premature convergence and stagnation, unlike Differential Evolution (DE), Harmony Search (HS). The simulation results prove that Simplex-PSO yields the optimized result with improved functionality. Simulation results obtained for CMOS TSC and CMOS FCOTA prove the effectiveness of the proposed Simplex-PSO method based approach over the reported DE, HS, and PSO in terms of convergence speed, design specifications and design objectives. The optimally designed TSC and FCOTA circuits, individually, occupy the least MOS areas and dissipate the least powers. The simulation plots and results are shown to have the improved performance parameters compared with those of other reported literature. Validation of the design is carried out by Cadence version 5 (IC 5.10.41) of TSMC 0.35 μm technology.

ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: AEU - International Journal of Electronics and Communications - Volume 70, Issue 4, April 2016, Pages 398–408
نویسندگان
, , , ,