Real time implementation of a signal denoising approach based on eight-bits DWT

The digital, real-time, implementation of de-noising technique based on Discrete Wavelet Transform (DWT) is of a great interest for many scientists. Indeed, the DWT provides effective representation to study the signal that can be described by a significant number of wavelet coefficients. Due to the orthogonality of the DWT, the noise provided has, in average, the same contribution to all obtained coefficients. During the implementation phase in the FPGA target, a judicious choice of optimization algorithms must be done on the internal logic elements, needed for the synthesis of the behavioral description of the components describing the architecture of this technique, and on the constraint of the real time in order to meet our requirement which consists of restoring the signal quality without affecting the robustness of this method. Our outlook is, among other, to further optimize this algorithm by introducing the concept of “Multi-Resolution Analysis” and the appropriate structure of multipliers based on the memories known as “Look-Up-Table” which are very efficient in terms of logic elements in order to solve the problem of information redundancy and therefore significantly simplify the calculations. Finally, to validate the results obtained, several test benches and simulations have been elaborated through “Quartus II and Modelsim” programming environments.