کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
457766 | 696040 | 2014 | 10 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Evaluation of stereo correspondence algorithms and their implementation on FPGA
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موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
شبکه های کامپیوتری و ارتباطات
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چکیده انگلیسی
The accuracy of stereo vision has been considerably improved in the last decade, but real-time stereo matching is still a challenge for embedded systems where the limited resources do not permit fast operation of sophisticated approaches. This work presents an evaluation of area-based algorithms used for calculating distance in stereoscopic vision systems, their hardware architectures for implementation on FPGA and the cost of their accuracies in terms of FPGA hardware resources. The results show the trade-off between the quality of such maps and the hardware resources which each solution demands, so they serve as a guide for implementing stereo correspondence algorithms in real-time processing systems.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Journal of Systems Architecture - Volume 60, Issue 1, January 2014, Pages 22–31
Journal: Journal of Systems Architecture - Volume 60, Issue 1, January 2014, Pages 22–31
نویسندگان
Carlos Colodro-Conde, F. Javier Toledo-Moreo, Rafael Toledo-Moreo, J. Javier Martínez-Álvarez, Javier Garrigós Guerrero, J. Manuel Ferrández-Vicente,