کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
460499 | 696381 | 2010 | 9 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
FPGA-implementation of atan(Y/X) based on logarithmic transformation and LUT-based techniques
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
شبکه های کامپیوتری و ارتباطات
پیش نمایش صفحه اول مقاله
چکیده انگلیسی
This paper presents an architecture for the computation of the atan(Y/X) operation suitable for broadband communications systems where a throughput between 20 and 40 MHz is required. The proposed architecture implements a division operation of two inputs by means of a logarithmic transformation, in which the division can be performed with a subtraction. A combination of non-uniform segmentation and multipartite LUT technique is proposed for the arctangent of the logarithm approximation. The architecture was implemented in a Xilinx FPGA device achieving higher throughput than the approach based on CORDIC algorithm and lower area than previous LUT-based approaches.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Journal of Systems Architecture - Volume 56, Issue 11, November 2010, Pages 588–596
Journal: Journal of Systems Architecture - Volume 56, Issue 11, November 2010, Pages 588–596
نویسندگان
R. Gutierrez, V. Torres, J. Valls,