Transactional memories for multi-processor FPGA platforms

Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programming efficiency of such systems. In field-programmable computing machines, a conventional fixed transactional memory becomes inefficient use of the silicon. We propose configurable transactional memory (CTM) as a mechanism to implement application specific synchronization that utilizes the field-programmability of such devices to match with the requirements of an application. The proposed configurable transactional memory is targeted at embedded applications and is area efficient compared to conventional schemes that are implemented with cache-coherent protocols. In particular, the CTM is designed to be incorporated in to compilation and synthesis paths of either high-level languages or during system creation process using tools such as Xilinx EDK. The proposed system supports an OpenMP-based programming paradigm for the efficient use of transactional memories. In addition, the conflict detection scheme can be configured to work either in lazy or in eager mode, depending on the application requirements. We study the impact of deploying a CTM using both micro-benchmarks and real applications as compared to a lock-based synchronization scheme. We have implemented the proposed scheme in a Xilinx Virtex4 device and found that the CTM can provide both higher programming efficiency, lower energy consumption and higher speedup than a fine-grained lock-based scheme.