کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
460767 696431 2011 11 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
A design scheme for a reconfigurable accelerator implemented by single-flux quantum circuits
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر شبکه های کامپیوتری و ارتباطات
پیش نمایش صفحه اول مقاله
A design scheme for a reconfigurable accelerator implemented by single-flux quantum circuits
چکیده انگلیسی

A large-scale reconfigurable data-path processor (LSRDP) implemented by single-flux quantum (SFQ) circuits is introduced which is integrated to a general purpose processor to accelerate data flow graphs (DFGs) extracted from scientific applications. A number of applications are discovered and analyzed throughout the LSRDP design procedure. Various design steps and particularly the DFG mapping process are discussed and our techniques for optimizing the area of accelerator will be presented as well. Different design alternatives are examined through exploring the LSRDP design space and an appropriate architecture is determined for the accelerator. Primary experiments demonstrate capability of the designed architecture to achieve performance values up to 210 Gflops for attempted applications.

ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Journal of Systems Architecture - Volume 57, Issue 1, January 2011, Pages 169–179
نویسندگان
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