کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
460870 | 696465 | 2008 | 14 صفحه PDF | دانلود رایگان |
![عکس صفحه اول مقاله: A monitoring-aware network-on-chip design flow A monitoring-aware network-on-chip design flow](/preview/png/460870.png)
Networks-on-chip (NoC) are a scalable interconnect solution for systems on chip and are rapidly becoming reality. Monitoring is a key enabler for debugging or performance analysis and quality-of-service techniques. The NoC design problem and the NoC monitoring problem cannot be treated in isolation. We propose a monitoring-aware NoC design flow able to take into account the monitoring requirements in general. We illustrate our flow with a debug driven monitoring case study of transaction monitoring. By treating the NoC design and monitoring problems in synergy, the area cost of monitoring can be limited to 3–20% in general. We also investigate run-time configuration options for the NoC monitoring system resulting in acceptable configuration times.
Journal: Journal of Systems Architecture - Volume 54, Issues 3–4, March–April 2008, Pages 397–410