Integrated circuits for coherent transceivers for 100 G and beyond

Application specific integrated circuits are considered as one essential building block for high speed digital transceivers. We review ASIC requirements and discuss architectural design limitations and implementation optimization options, both driven by system requirements. We provide hardware based proof points for a 100 G design solution and highlight challenges for future designs beyond 100 G.

► ASIC are key building blocks for high speed optical transceivers.
► ASIC design requirements and limitations are reviewed and discussed.
► Implementation examples for 100 G are provided as proof points.
► An outlook for beyond 100 G is described.