کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
462809 | 696906 | 2013 | 12 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Scalable matrix decompositions with multiple cores on FPGAs
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
شبکه های کامپیوتری و ارتباطات
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چکیده انگلیسی
Hardware accelerators are getting increasingly important in heterogeneous systems for many applications, including those that employ matrix decompositions. In recent years, a class of tiled matrix decomposition algorithms has been proposed for out-of-memory computations and multi-core architectures including GPU-based heterogeneous systems. However, on FPGAs these scalable solutions for large matrices are rarely found. In this paper we use the latest tiled decomposition algorithms from high performance linear algebra for off-chip memory access and loop mapping on multiple processing cores for on-chip computation to perform scalable and high performance QR and LU matrix decompositions on FPGAs.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microprocessors and Microsystems - Volume 37, Issue 8, Part B, November 2013, Pages 887–898
Journal: Microprocessors and Microsystems - Volume 37, Issue 8, Part B, November 2013, Pages 887–898
نویسندگان
Yi-Gang Tai, Chia-Tien Dan Lo, Kleanthis Psarris,