Analytical derivation of traffic patterns in cache-coherent shared-memory systems

This paper presents an analytical method to derive the worst-case traffic pattern caused by a task graph mapped to a cache-coherent shared-memory system. Our analysis allows designers to rapidly evaluate the impact of different mappings of tasks to IP cores on the traffic pattern. The accuracy varies with the application’s data sharing pattern, and is around 65% in the average case and 1% in the best case when considering the traffic pattern as a whole. For individual connections, our method produces tight worst-case bandwidths.

► Synthesis of interconnect requires model of communication in an application.
► Gap exists between models of applications and models of communication.
► Analytical derivation of communication from application model.
► Validation of derivation by comparison with simulation.
► Derived total communication 65% above simulation on average, 1% in best case.