کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
463086 696952 2007 10 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
Configurable implementation of parallel memory based real-time video downscaler
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر شبکه های کامپیوتری و ارتباطات
پیش نمایش صفحه اول مقاله
Configurable implementation of parallel memory based real-time video downscaler
چکیده انگلیسی

Image downscaling is necessary in multiresolution video streaming and when a camera captures larger resolution frames than required. This paper presents an implementation of a downscaler capable of real-time scaling of color video. The scaler can be configured to support nearly arbitrary scaling ratios. The scaling method is based on evenly divisible image sizes, which is, in practice, the case in most video and image standards. Bilinear interpolation is utilized as the scaling algorithm. Fine-grained parallel processing is utilized to increase performance and parallel memories are used to attain the required bandwidth. The results show that an FPGA implementation can downscale 16VGA and HDTV video in real-time with a complexity of less than half of the reference implementations.

ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microprocessors and Microsystems - Volume 31, Issue 5, 1 August 2007, Pages 283–292
نویسندگان
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