Low-power subthreshold to above threshold level shifters in 90 nm and 65 nm process

In this paper we present low power level shifters in the 90 nm (general purpose) and 65 nm (low power) technology nodes capable of converting subthreshold voltage signals to above threshold voltage signals. The level shifters make use of the MTCMOS design technique which gives more design flexibility, especially in low power systems. Post layout simulations indicate static power consumption down to 1 nW and 83 pW in the 90 nm and 65 nm process respectively. Energy consumption per transition is recorded to be below 30 fJ in both processes, orders of magnitude lower then other published level shifter implementations. Propagation delay is found to be as low as 32 ns for subthreshold logic high input signals of 180 mV. The functionality of the level shifters is verified across process-, mismatch- and temperature variations between −40 °C and 150 °C. Minimum input voltage attainable while maintaining robust operation is found to be around 180 mV at operational frequencies above 1 MHz in the 90 nm process, and 350 mV at operational frequencies above 500 kHz in the 65 nm process. The level shifters employ an enable/disable feature, allowing for power saving when the level shifter is not in use.