Behavioral modeling of clock feed-through and channel charge injection non-ideal effects in SIMULINK for switched-capacitor integrator

Sigma–Delta modulator ADCs used in signal processing applications usually, are implemented by switched-capacitor (SC) circuits and CMOS transmission gates due to its simplicity for implementation. Channel charge injection (CCI) and clock feed-through (CFT) are two major non-ideal effects existing in TG switches and SC integrators reducing modulator total SNR, its linearity and its total gain. This paper presents a precise model for SC integrator including CCI and CFT non-ideal effects in MATLAB SIMULINK environment which allows designers to perform time-domain behavioral simulations of switched-capacitor (SC) Sigma–Delta modulators. Evaluation and validation of extracted models were performed via behavioral and transistor-level simulations for modeled SC integrator, second and third order modulators using SIMULINK and Agilent ADS environments with a generic 0.18 μm CMOS technology. Non-idealities and nonlinearities effects are apparently observed by comparing the ideal modulator in behavioral analysis and actual modulator in circuit-level environment.