Design, Performance Analysis and Application of a Modified Improved MOS Regulated Cascode Circuit

Cascode circuit which behave like a MOS transistor but features high output impedance and low feedback capacitance are integral part of the high performance analog VLSI design. This paper investigates the working of the classical regulated cascode circuit and a new modified one is proposed. The basic intention of the new design is to reduce the threshold voltage of the classical cascode circuit to start the regulating process. Significant improvement is observed through simulation. PSpice is used to carry out the simulation work. The simulation experimental data and graphs confirming the theoretical analysis are presented. Finally a current mirror circuit is designed using the modified cascode structure.