Sub 0.5-V bulk-driven LTA in 0.18 μm CMOS

The paper deals with a new solution for an ultra-low-voltage loser take all (LTA) circuit, capable to operate from supply voltages ranging from 0.3 to 0.5 V. The proposed circuit exploit the idea of multiple voltage buffers with a common output. In order to obtain a compact and precise LTA, a new kind of an ultra-low-voltage buffer has been developed. Owing to the fact that for such a low supply voltage the available voltage swing is highly reduced, the impact of transistor mismatches and speed-accuracy-power tradeoffs have extensively been discussed in the paper. While implemented in a standard 0.18 μm CMOS process, the proposed LTA circuit in a two-input version consumes 3.0 μW from a 0.5 V supply and provides 10 μs crossover recovery time for a 1 pF load capacitance.