Analysis and validation of wavelet transform based DC fault detection in HVDC system

Fault detection plays an important role in both conventional AC and upcoming DC power systems. This paper aims to study the application of discrete wavelet transform (WT) for detecting the DC fault in the high voltage DC (HVDC) system. The methods of choosing the mother wavelet suited for DC fault is presented, based on degree of correlation to the fault pattern and the time delay. The wavelet analysis is performed on a multi-terminal HVDC system, built in PSCAD/EMTDC software. Its performance is judged for critical parameter like the fault location, resistance and distance. The analysis is further extended to validation using results from experiment, which is obtained from a lab-scale DC hardware setup. Load change, one of the transient disturbances in power system, is carried out to understand the effectiveness of the wavelet transform to differentiate it from the DC fault. The noise in the experimental result gives rise to non-zero wavelet coefficient during the steady-state. This can be improved by removing the unwanted noise using right filter while still retaining the fault-induced transient. The wavelet transform is compared with short-time Fourier transform to highlight the issue with window size and noise.