Design and implementation of a RADIX-4 FFT using FPGA technology

Radar systems rely on a wide variety of digital signal processing algorithms. One of them is the Fast Fourier Transform FFT used to detect the targets' Doppler frequency for measuring their velocity. Field Programmable Gate Arrays FPGAs offer a high performance and flexibility for real time implementation. In this paper, an FPGA parallel implementation of 16-complex point radix-4 Decimation in Frequency FFT is proposed on FPGA-XC4000L family includes the target device 4005LPC84. The core architecture has been implemented using the schematic option and functionality simulated using Xilinx foundation 2.li. The results were compared with that obtainedusing MA TLAB subroutines.