Research ArticleProgrammable logic controller performance enhancement by field programmable gate array based design

- A new proposed design based on FPGA for enhancement of PLC Performance and Flexibility.
- A novel design for PLC that works faster with smaller scan time and compact in size as compared to the conventional PLC.
- Useful features such as less power consumption and high flexibility due to reconfigurable hardware.
- Simulation and Testing-Validation of the proposed design by implementation using industry-standard hardware-software platforms.
- Noteworthy merits such as Cost-effectiveness, Easy Design Migration, User-Friendliness and Simplicity as an Industry-grade Solution.
- Successful testing of basic functionalities of PLC operations and enhanced GUI.

PLC, the core element of modern automation systems, due to serial execution, exhibits limitations like slow speed and poor scan time. Improved PLC design using FPGA has been proposed based on parallel execution mechanism for enhancement of performance and flexibility. Modelsim as simulation platform and VHDL used to translate, integrate and implement the logic circuit in FPGA. Xilinx's Spartan kit for implementation-testing and VB has been used for GUI development. Salient merits of the design include cost-effectiveness, miniaturization, user-friendliness, simplicity, along with lower power consumption, smaller scan time and higher speed. Various functionalities and applications like typical PLC and industrial alarm annunciator have been developed and successfully tested. Results of simulation, design and implementation have been reported.