Speculative segmented sum for sparse matrix-vector multiplication on heterogeneous processors

• A speculative segmented sum strategy for the CSR-based SpMV.
• Utilizing both GPU cores and CPU cores in a heterogeneous processor.
• No format conversion or tuning overhead for input sparse matrices in the CSR format.
• High speedup over the CSR-vector algorithm running irregular matrices.
• No performance penalty for most regular matrices.

Sparse matrix-vector multiplication (SpMV) is a central building block for scientific software and graph applications. Recently, heterogeneous processors composed of different types of cores attracted much attention because of their flexible core configuration and high energy efficiency. In this paper, we propose a compressed sparse row (CSR) format based SpMV algorithm utilizing both types of cores in a CPU–GPU heterogeneous processor. We first speculatively execute segmented sum operations on the GPU part of a heterogeneous processor and generate a possibly incorrect result. Then the CPU part of the same chip is triggered to re-arrange the predicted partial sums for a correct resulting vector. On three heterogeneous processors from Intel, AMD and nVidia, using 20 sparse matrices as a benchmark suite, the experimental results show that our method obtains significant performance improvement over the best existing CSR-based SpMV algorithms.