Design of high speed gate driver employing IZO TFTs

• The design of high speed gate driver is optimized by calculation and simulation.
• A 20 stages high speed gate driver is fabricated by IZO TFTs process.
• A 2.6 μs width pulse can be output at the condition of Rload = 6 kΩ and Cload = 150 pF.
• There is a good stability verified by a 48 h test.

This paper presents a new bi-side gate driver integrated by indium-zinc-oxide thin film transistors (IZO TFTs). Our optimized operate method can achieve high speed performance by employing a lower duty ratio (25%) CK2 with its pulse located in the middle of the pulse of CK2L to fully use the bootstrapped high voltage of node Q. In addition, the size of devices is optimized by calculation and simulation, and the function of the proposed gate driver is predicted by the circuit simulation. Furthermore, the proposed gate driver with 20 stages is fabricated by the IZO TFTs process. It is shown that a 2.6 μs width pulse with good noise-suppressed characteristic can be successfully output at the condition of Rload = 6 kΩ and Cload = 150 pF. The power consumption of the proposed gate driver with 20 stages is measured as 1 mW. Hence, the proposed gate driver may be applied to the display of 4K resolution (4096 × 2160) at a frame rate of 120 Hz. Moreover, there is a good stability for the proposed gate driver under 48 h operation.