An optimized reconfigurable algorithm for FPGA architecture oriented IoT applications

Application Specific Integrated Circuit (ASIC) can facilitate the user with high speed, but a small modification in the algorithm and architecture will lead to more cost in terms of design and development. In contrast Field Programmable Gate Array (FPGA) provides near optimal speed with reconfigurability of algorithm/architecture at any time. From research survey, we come to conclusion that Fast Fourier Transform (FFT) plays critical role in many applications such as Orthogonal Frequency Division Multiplexing (OFDM), image processing application and signal processing application. In this paper, we have developed a reconfigurable FPGA architecture for FFT algorithm. Also, reconfigurable algorithm is proposed to handover the reconfiguration control, so that the datapath can be changed. The proposed reconfigurable FPGA architecture is developed using Verilog and targeted in Altera FPGA boards. The evaluation and comparison of the proposed architecture shows remarkable improvement in terms of throughput, area and power.