Novel architectural space exploration environment for multi-FPGA based prototyping systems

Prototyping of complex digital systems using multi-FPGA platforms offers several key advantages over other prototyping techniques. These advantages include higher execution speed, lower cost, and real world testing experience. The quality of a prototyped design, however, is adversely affected by nonexistence of multi-FPGA exploration environments. This work presents a novel, generalized exploration environment for multi-FPGA platforms that gives end-to-end exploration experience. For experimentation purpose, ten large benchmarks are generated, synthesized, and partitioned using a combination of locally developed and commercial tools. FPGA board exploration is then performed through locally developed timing-driven inter-FPGA routing tool where five FPGA boards are used and for each board, four different inter-FPGA track combinations are explored. For experimentation, number of FPGAs on board are varied from two to six and impact of this variation is observed on the frequency of prototyped design. Experimental results show that FPGA boards with inter-FPGA tracks corresponding closely to cut net requirement of partitioned benchmarks give, on average, best frequency results. Moreover, FPGA boards having higher number of FPGAs give, on average, better frequency results as compared to boards having smaller number of FPGAs. Furthermore, a comparison between timing-driven and routability-driven inter-FPGA routing approaches shows that former approach requires, on average, 46% less execution time than the later while giving same frequency results. Finally, validation of proposed environment is also performed through in-circuit verification of sample benchmarks on a stack of FPGA boards.