کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
726365 | 892603 | 2006 | 14 صفحه PDF | دانلود رایگان |

This paper will first focus on the guard ring structures, design methodology, integration, experimental results and analysis. In this paper, the focus will be on test structure design issues, electrical characterization, and computer aided design (CAD) methodologies for advanced digital design, and mixed signal applications. The integration of “parameterized cell” guard ring structures concept into a Cadence™ based design methodology for the construction of electrostatic discharge (ESD) structures, I/O design, and latchup for radio frequency (RF) CMOS and Silicon Germanium technology will be discussed. The importance of the guard ring p-cell allows for evaluation of internal and external latchup, and the ability to verify the presence of the guard ring for whole chip design checking, verification and synthesis will be addressed. Additionally, this independent guard ring concept opens the door for a new methodology for RF design of primitive and hierarchical implementations.
Journal: Journal of Electrostatics - Volume 64, Issue 11, October 2006, Pages 730–743