On the sensitivity improvement of CMOS capacitive accelerometer

This study presents an improved CMOS capacitive accelerometer design. In this design, the sensitivity has been increased by adding the number of sensing finger arrays. Moreover, the present accelerometer successfully employs the additional springs and post on CMOS chip for electrical routing of sensing fingers. In general, the present study enables the increasing of sensing capacitance by 80%, at the cost of the decreasing of proof mass by 20%. Thus, the net sensitivity of the accelerometer will still be increased by 1.44-fold without changing its die size. As to the accelerometers of the same fundamental frequency, the sensitivity of the present design can even be increased by 1.8-fold without changing its die size. The measurement results show that the sensitivity and the nonlinearity of a typical improved accelerometer are 3.95 mV/G, and 2.75%, respectively. As a comparison, the existing accelerometer of the same die size and fundamental frequency (i.e. stiffness to mass ratio) has the sensitivity and the nonlinearity of 2.10 mV/G, and 2.87%, respectively. The results demonstrate that the present design has successfully improved the sensitivity of the CMOS capacitance accelerometer by 1.88-fold.