کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
757720 | 1462557 | 2007 | 9 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
A Novel Design of Efficient Multi-channel UART Controller Based on FPGA
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موضوعات مرتبط
مهندسی و علوم پایه
سایر رشته های مهندسی
مهندسی هوافضا
پیش نمایش صفحه اول مقاله
چکیده انگلیسی
In traditional universal asynchronous receiver transmitter (UART) controller, the data transmission is inefficient and the data bus utilization ratio is low. A novel design is provided to solve these problems. The architecture of the system is introduced, the flow charts of data processing as well as the implementation state machine are also presented in detail. This paper is concluded by comparing the performance of this design, which is realized on field programmable gate array (FPGA) using Verilog hardware description language (HDL), with other traditional UART controllers.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Chinese Journal of Aeronautics - Volume 20, Issue 1, February 2007, Pages 66-74
Journal: Chinese Journal of Aeronautics - Volume 20, Issue 1, February 2007, Pages 66-74