کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
865974 | 909690 | 2007 | 4 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Mapping of Irregular IP onto NoC Architecture with Optimal Energy Consumption
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
سایر رشته های مهندسی
مهندسی (عمومی)
پیش نمایش صفحه اول مقاله

چکیده انگلیسی
Network on chip (NoC) architectures have been proposed to resolve complex on-chip communication problems. An NoC-based mapping algorithm is shown in this paper. It can map irregular intellectual properties (IPs) cores onto regular tile 2-D mesh NoC architectures. The basic idea is to decompose a large IP into several dummy IPs or integrate several small IPs into one dummy IP, such that each dummy IP can fit into a single tile. It can also allocate buffer space according to the input/output degree and avoid connection congestion by adapting communication density. Experimental data indicate that using the algorithm proposed in this paper, the communication energy can be reduced about 7%.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Tsinghua Science & Technology - Volume 12, Supplement 1, July 2007, Pages 146-149
Journal: Tsinghua Science & Technology - Volume 12, Supplement 1, July 2007, Pages 146-149
نویسندگان
Li (æå
顺), Wu (å´ä¿å), Ma (马å
è),