کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
9660706 | 696478 | 2005 | 11 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
An application of functional decomposition in ROM-based FSM implementation in FPGA devices
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
شبکه های کامپیوتری و ارتباطات
پیش نمایش صفحه اول مقاله
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چکیده انگلیسی
Modern FPLD devices have very complex structure. They combine PLA like structures, as well as FPGA and even memory-based structures. However lack of appropriate synthesis methods do not allow fully exploiting the possibilities the modern FPLDs offer. The paper presents a general method for the synthesis targeted to implementation of sequential circuits using embedded memory blocks. The method is based on the serial decomposition concept and relies on decomposing the memory block into two blocks: a combinational address modifier and a smaller memory block. An appropriately chosen decomposition strategy may allow reducing the required memory size at the cost of additional logic cells for address modifier implementation. This makes possible implementation of FSMs that exceed available memory by using embedded memory blocks and additional programmable logic.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Journal of Systems Architecture - Volume 51, Issues 6â7, JuneâJuly 2005, Pages 424-434
Journal: Journal of Systems Architecture - Volume 51, Issues 6â7, JuneâJuly 2005, Pages 424-434
نویسندگان
Mariusz Rawski, Henry Selvaraj, Tadeusz Åuba,