A 5-10Â GHz SiGe BiCMOS FPGA with new configurable logic block

This paper presents a new multiplexer based FPGA, which can operate at a clock frequency of 5-10 GHz. Redundant switches on the original signal paths are removed improving the performance. The configurable logic blocks (CLBs) power is greatly reduced by using a revised multiplexer structure and turning off unused cells dynamically. More routing capabilities are provided with more inputs/outputs in each direction than similar designs. A chip consisting of four FPGA ring oscillators was fabricated. The Spice simulation results and chip measurements are presented.