کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
10365327 872037 2005 9 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
Test circuits for fast and reliable assessment of CDM robustness of I/O stages
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر سخت افزارها و معماری
پیش نمایش صفحه اول مقاله
Test circuits for fast and reliable assessment of CDM robustness of I/O stages
چکیده انگلیسی
CDM hardening during the development of technology, devices, libraries and finally products differs significantly from the process well-established for HBM. This paper introduces a method on the basis of specialized CDM test structures including protection elements and sensitive monitor elements. These test structures mimic typical CDM-sensitive circuits found by physical failure analysis over the years. Manufactured in five different technologies, structures were assembled in both a regular package and a new package emulator. CDM stress tests, very-fast TLP tests, transient interferometric mapping, device simulation, and failure analysis lead to new insights in the complex interdependencies during CDM and underline the need of CDM-specific test structures.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microelectronics Reliability - Volume 45, Issue 2, February 2005, Pages 269-277
نویسندگان
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