A novel, PLL-based frequency-to-digital conversion mechanism for sensor interfaces

Due to the ongoing trend towards smaller technologies, time-/frequency-to-digital conversion is gaining popularity. It benefits from the improved timing resolution in new technologies whereas voltage processing suffers from reduced signal swing and non-idealities. In this paper a new PLL architecture for digitization of sensor signals is described which fully exploits the benefits of frequency processing combined with the benefits from traditional sigma-delta voltage converters. Furthermore it is demonstrated that this architecture is flexible towards different sensor applications that require different specifications. Its working principle and relevance is explored with system-level simulations, and the robustness towards noise and non-idealities (temperature drift, voltage dependency) is demonstrated.