Hybrid CMOS thin-film devices based on solution-processed CdS n-TFTs and TIPS-Pentacene p-TFTs

► Solution based CdS n-TFTs exhibit mobilities >10 cm2/V s. ► Patterned robust and scalable technology developed with TIPS-Pentacene p-TFTs. ► Full photolithographically defined hybrid CMOS inverters and NANDs are demonstrated. ► Low temperature processing below 100 °C.