کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
10706482 1023482 2005 4 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
A low-power cache with successive tag comparison algorithm
موضوعات مرتبط
مهندسی و علوم پایه فیزیک و نجوم فیزیک ماده چگال
پیش نمایش صفحه اول مقاله
A low-power cache with successive tag comparison algorithm
چکیده انگلیسی
In recent years, power consumption has become one of the most critical design concerns in designing VLSI systems. The reduction of power consumption is inevitably required by the emergence of highly efficient and fast systems, which include CPU (central processor unit), MCU (micro controller unit), cache, et cetera. This paper introduces a new low-power cache controller with successive tag comparison algorithm. Using these methods, the power consumption of a cache can be reduced. Simulation results show that the power consumption of a cache using the proposed method is reduced by 42% compared with conventional methods.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Current Applied Physics - Volume 5, Issue 3, March 2005, Pages 227-230
نویسندگان
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