Analysis and implementation of impedance source based Switched Capacitor Multi-Level Inverter

In recent years, a numerous Multi-Level Inverter (MLI) topologies are proposed with reduced number of switches and control complexity. An Impedance source based MLI structure with ability of additional boost is proposed in this work. The proposed topology requires one source, one impedance network and reduced number of switches when compared to recently reported inverter literature. Due to Self-voltage Balancing circuit (SBC), the fixed boost of 1.5 times the input and equal voltage across all the capacitors are achieved. An additional boost is obtained by placing impedance network between input source and SBC. The proposed Inverter is compared with existing topologies with respect to a number of sources, number of impedance networks, control switches, voltage balancing and boost capability. A simple level shifted based sinusoidal pulse width modulation technique is adopted for generating gate pulses. Further theoretical analysis and computer aided simulation results are validated with the experimental results.