Properties of silicon nanolayers on insulator

The evaluation of structural and electrical properties of the SOI wafers during the silicon layer thinning procedure is discussed in the present report. The SOI wafers were obtained using the technology, which involves bonding and hydrogen-induced transfer of silicon layer onto handle oxidized wafer. Interface between the top silicon layer and the buried oxide is the bonded one. Czochralski grown silicon (Cz-Si) or Float Zone grown silicon (Fz-Si) were used as initial material for SOI. The thickness of silicon layer was varied from 590 to 7 nm by using: (1) series of thermal oxidation at the 1000–1100 °C followed by etching of the sacrificial oxide; (2) chemical oxidation and etching in HNO3:HF = 100:1 solution. The SOI layers of different thickness were doped with boron or phosphorus up to concentration 1019 cm−3. Structural defects in SOI wafers were detected by means of optical and scanning electron microscope. The point-contact-transistor method with substrate as a gate was applied for testing of the SOI conductivity.It is shown that the modification of structural properties of SOI occurs during oxidation which appears in the HF defects formation. The main part of the HF defects is formed near the external SOI/SiO2 interface. Growing thermal oxide eliminates the part of generated HF defects. Average size of HF defects is 70–100 nm for Cz-SOI and less than 50 nm for Fz-SOI. HF defects presumably are the effective getters for implanted defects and/or impurity. The presence of HF defects with 104 cm−2 density can result in full loss of the conductivity in Si nanolayers after high-dose implantation and annealing.