DC and AC electrical characteristics of porous GaAs/p+–GaAs heterostructure

This paper reports on studying Au/porous GaAs/p+–GaAs heterostructure through current–voltage I (V), conductance– and capacitance–frequency dependencies (G (f) and C (f)). Diode parameters such as ideality factor and zero bias barrier energy have been calculated by using Schottky model corrected from the series resistance. The obtained ideality factor is generally high and it was explained by space charge limited current (SCLC) regime, characterised by the presence of single trapping level. A model based upon TFE tunnelling of carriers at reverse current was used to explain the non-saturation of reverse current after series resistance correction. The G (f) characteristics exhibit the presence of three frequency regions. In the first region the conductance is independent of frequency. Moreover, in the second region the AC conductance increases with increasing frequency and approximately follows ωs dependence. These results were interpreted as the result of the transport of injected carrier via hopping mechanism involving defect. In the third region a peak conductance appeared after which the conductance decreased with increasing frequency. C (f) measurements exhibit that the capacitance behaviour is typical of material with traps. From G (f) and C (f) measurement trap density and relaxation time were calculated.