Embedded nonuniformity correction in infrared focal plane arrays using the Constant Range algorithm

• We present a digital hardware architecture for real-time NUC in IR embedded imagers.
• We designed and implemented a prototype in a field-programmable gate array (FPGA).
• We designed and simulated a custom integrated circuit version of the architecture.
• We present experimental results from the FPGA prototype.

We present a digital fixed-point architecture that performs real-time nonuniformity correction in infrared (IR) focal plane arrays using the Constant Range algorithm. The circuit estimates and compensates online the gains and offsets of a first-order nonuniformity model using pixel statistics from the video stream. We demonstrate our architecture with a prototype built on a Xilinx Spartan-6 XC6SLX45T field-programmable gate array (FPGA), which can process an IR video stream from a FLIR Tau 2 long-wave IR camera with a resolution of 640×480640×480 14-bit pixels at up to 238 frames per second (fps) with low resource utilization and adds only 13 mW to the FPGA power. Post-layout simulations of a custom integrated circuit implementation of the architecture on a 32 nm CMOS process show that the circuit can operate at up to 900 fps at the same resolution, and consume less than 4.5 mW.