A large surface photomultiplier based on SiPMs

Light detection through photosensitive devices represents one of the key issues for a large variety of experiments. In the recent years, Silicon PhotoMultipliers (SiPMs) based on limited Geiger-mode avalanche have been extensively studied in view of their future applications. However, their use is strongly limited by their small sensitive surfaces and by the fact that any increment in the surface turns out into an increase of the dark count rate. In the present work we describe the dark count rate reduction obtained by using a FPGA-based logical circuit for fast pre-processing of pulses from a 3×3 matrix of SiPMs. The prototype we developed supports two SiPMs: we show that a rate reduction from 6.6 Mcps (Mega counts per second) down to 0.436 Mcps at the lowest threshold (0.5 photon-equivalent) and from 1.2 kcps down to 0.02 cps for the highest threshold (3.5 photon-equivalent) is obtainable.