Large monolithic particle pixel-detector in high-voltage CMOS technology

A large monolithic particle pixel-detector implemented as system on a chip in a high-voltage 0.35μm CMOS technology will be presented. The detector uses high-voltage n-well/p-substrate diodes as pixel-sensors. The diodes can be reversely biased with more than 60 V. In this way, depleted zones of about 10μm thickness are formed, where the signal charges can be collected by drift. Due to fast charge collection in the strong electric-field zones, a higher radiation tolerance of the sensor is expected than in the case of the standard MAPS detectors. Simple pixel-readout electronics are implemented inside the n-wells. The readout is based on a source follower with one select- and two reset-transistors. Due to embedding of the pixel-readout electronics inside the collecting electrodes (n-wells) there are no insensitive zones within the pixel matrix. The detector chip contains a 128×128 matrix consisting of pixels of 21×21μm2 -size. The diode voltages of one selected pixel-row are received at the bottom of the matrix by 128 eight-bit single-slope ADCs. All ADCs operate in parallel. The ADC codes are read out using eight LVDS 500 MBit/s output links. The readout electronics are designed to allow the readout of the whole pixel matrix in less than 50μs. The total DC power consumption of the chip is 50 mW. All analog parts of the chip are implemented using radiation-hard layout techniques. Experimental results will be presented.