Implementation of a neuro-fuzzy network with on-chip learning and its applications

The implementation of adaptive neural fuzzy networks (NFNs) using field programmable gate arrays (FPGA) is proposed in this study. Hardware implementation of NFNs with learning ability is very difficult. The backpropagation (BP) method in the learning algorithm is widely used in NFNs, making it difficult to implement NFNs in hardware because calculating the backpropagation error of all parameters in a system is very complex. However, we use the simultaneous perturbation method as a learning scheme for the NFN hardware implementation. In order to reduce the chip area, we utilize the traditional non-linear activation function to implement the Gaussian function. We can confirm the reasonableness of NFN performance through some examples.