کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
447812 | 1443199 | 2011 | 8 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
FPGA implementation of vector directional distance filter based on HW/SW environment validation
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
شبکه های کامپیوتری و ارتباطات
پیش نمایش صفحه اول مقاله
![عکس صفحه اول مقاله: FPGA implementation of vector directional distance filter based on HW/SW environment validation FPGA implementation of vector directional distance filter based on HW/SW environment validation](/preview/png/447812.png)
چکیده انگلیسی
In this paper a new FPGA implementation approach of vector directional distance filter (VDDF) using HW/SW solution is presented. The challenges of our solution include ease of implementation, good accuracy and relatively high speed. We use approximations to solve hardware limitations. HW/SW solution uses Nios-II FPGA development board. Experimental results using a number of color images show that the approximated VDDF achieves an excellent balance between computational speed and filtering quality. Moreover, the efficient design processes at 110 MHz system clock and gives a good execution time compared to the software based solution.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: AEU - International Journal of Electronics and Communications - Volume 65, Issue 3, March 2011, Pages 250–257
Journal: AEU - International Journal of Electronics and Communications - Volume 65, Issue 3, March 2011, Pages 250–257
نویسندگان
Anis Boudabous, Ahmed Ben Atitallah, Lazhar Khriji, Patrice Kadionik, Nouri Masmoudi,