Keywords: شتاب سخت افزاری; Hardware acceleration; Biomedical image analysis; Cytometry; Reconfigurable hardware; FPGA; High throughput;
مقالات ISI شتاب سخت افزاری (ترجمه نشده)
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در صورتی که به ترجمه آماده هر یک از مقالات زیر نیاز داشته باشید، می توانید سفارش دهید تا مترجمان با تجربه این مجموعه در اسرع وقت آن را برای شما ترجمه نمایند.
Keywords: شتاب سخت افزاری; Data mining; Machine learning; Hardware-software co-design; Decision trees; Evolutionary algorithms; Ensemble classifiers; Hardware acceleration; FPGA; Co-processor;
Keywords: شتاب سخت افزاری; Hybrid computing; Heterogeneous computing; Hardware acceleration; Power-efficient linear system solving; GPU; Field programmable gate arrays;
Keywords: شتاب سخت افزاری; Data mining; Machine learning; Hardware-software co-design; Decision trees; Evolutionary algorithms; Hardware acceleration; FPGA; Co-processor;
Keywords: شتاب سخت افزاری; Homogeneous and heterogeneous ensemble classifiers; Decision trees; Support vector machines; Artificial neural networks; Hardware acceleration; Reconfigurable hardware
Keywords: شتاب سخت افزاری; FPGA; Real-time simulation; Hardware-in-the-loop; Non-linear functions; Hardware acceleration
Keywords: شتاب سخت افزاری; Retinal vessel segmentation; Portable biometrics; On-site medical diagnostics; Reconfigurable parallel architectures; Hardware acceleration
Keywords: شتاب سخت افزاری; Image boundary detection; Hardware acceleration; Parallel computing; Real-time performance; Field programmable gate arrays (FPGAs)
Keywords: شتاب سخت افزاری; Intelligent vision sensor; Bio-inspired architecture; Scale-invariant feature; Real-time object tracking; Resistive network; Hardware acceleration
ALAMO: FPGA acceleration of deep learning algorithms with a modularized RTL compiler
Keywords: شتاب سخت افزاری; Convolutional neural networks; FPGA; RTL; Hardware acceleration; Compiler;
CAEMO - A Flexible and scalable high performance matrix algebra coprocessor for embedded reconfigurable computing systems
Keywords: شتاب سخت افزاری; Matrix algebra; Hardware acceleration; Embedded systems; FPGA;
Particle MCMC algorithms and architectures for accelerating inference in state-space models
Keywords: شتاب سخت افزاری; Markov Chain Monte Carlo; Particle filter; Field programmable gate array; Bayesian inference; Hardware acceleration;
Hardware-accelerated generation of 3D diffusion-limited aggregation structures
Keywords: شتاب سخت افزاری; Diffusion-limited aggregation; Simulation; Hardware acceleration; OpenCL; Multi-core CPU; GPU; FPGA
SAccO: An implementation platform for scalable FPGA accelerators
Keywords: شتاب سخت افزاری; Reconfigurable computing; Hardware acceleration; FPGA; Coprocessor; Implementation platform; Hardware/software codesign
A study on the possibility of implementing a real-time stereoscopic 3D rendering TV system
Keywords: شتاب سخت افزاری; Stereoscopic 3D; Computational complexity; Real-time image processing; Hardware acceleration
FPGA acceleration of semantic tree reasoning algorithms
Keywords: شتاب سخت افزاری; Dynamic recursive data structures; Hardware acceleration; Reconfigurable logic; Artificial Intelligence; Reasoning algorithms
An FPGA-based platform for accelerated offline spike sorting
Keywords: شتاب سخت افزاری; Spike sorting; Hardware acceleration; FPGA;
FPGA-based hardware acceleration for local complexity analysis of massive genomic data
Keywords: شتاب سخت افزاری; Bioinformatics; Reconfigurable parallel architectures; Genomics; Hardware acceleration
Falling-incident detection and throughput enhancement in a multi-camera video-surveillance system
Keywords: شتاب سخت افزاری; Falling detection; Pattern-recognition; Video surveillance; Hardware acceleration; Image processing
A comparison of 3D cone-beam Computed Tomography (CT) image reconstruction performance on homogeneous multi-core processor and on other processors
Keywords: شتاب سخت افزاری; Computed Tomography (CT); Graphic Processing Unit (GPU); Hardware acceleration; 3D reconstruction; Multi-core processor; Parallel processing
FPGA implementation of vector directional distance filter based on HW/SW environment validation
Keywords: شتاب سخت افزاری; Nonlinear filter; Color image; FPGA implementation; Hardware acceleration
Localized construction of curved surfaces from polygon meshes: A simple and practical approach on GPU
Keywords: شتاب سخت افزاری; Curved surface; Localized construction; Hardware acceleration; G1G1 continuity; Sharp feature
Hardware accelerated FPGA placement
Keywords: شتاب سخت افزاری; FPGA; CAD; Placement; Hardware acceleration; Reconfigurable computing; VHDL
Architecture and scalability of a high-speed traffic measurement platform with a highly flexible packet classification
Keywords: شتاب سخت افزاری; Passive traffic measurement; Packet classification; Architecture; Scalability analysis; Prototype; Hardware acceleration
FPGA acceleration of a quantum Monte Carlo application
Keywords: شتاب سخت افزاری; Reconfigurable computing; Computational chemistry; Hardware acceleration; Monte Carlo
A two-stage hardware scheduler combining greedy and optimal scheduling
Keywords: شتاب سخت افزاری; Maximum matching; Time division multiplexing; Circuit switching; Large cardinality cross bar; Scheduling; Hardware acceleration
A hardware acceleration of the time domain boundary integral equation method for the wave equation in two dimensions
Keywords: شتاب سخت افزاری; Boundary integral equation method; Boundary element method; Hardware acceleration; Special-purpose computer; Wave equation; Vectorisation; Parallelisation
Hardware acceleration of the Tate pairing on a genus 2 hyperelliptic curve
Keywords: شتاب سخت افزاری; Tate pairing; ηT method; Genus 2 hyperelliptic curve; Hardware acceleration; FPGA;
Deferred blending: Image composition for single-pass point rendering
Keywords: شتاب سخت افزاری; Point based rendering; Transparency; Alpha blending; Hardware acceleration; GPU processing
Efficient anti-aliased bump mapping
Keywords: شتاب سخت افزاری; Anti-aliased; Bump mapping; MIP mapping; Hardware acceleration
L3: An FPGA-based multilayer maze routing accelerator
Keywords: شتاب سخت افزاری; VLSI routing; Hardware acceleration; Lee algorithm; FPGA design;